Citation: V. Di Lecce, P. Camarda, B. Castagnolo, F. Corsi, Design and cost evaluation of simple interconnection circuits for multiprocessor system, Proceedings of IEEE 1988 International Symposium on Circuits and Systems. Espoo Finland, pp. 185-188, June 7-9, 1988.
Abstract: The generalized Hypercube (GHC) interconnection network is one of the most employed in multiprocessor systems among the meltidimensional structures; for it characteristics of reliability and communication performances. Therefore it has been chosen in design of a processor for parallel implementation of a 2D-FFT algorithm. An interface has been designed, up to layout level, capable of signalling transmission errors, exploiting in this way the characteristics of the structure the design has allowed the determination also of the cost of the network: althrough the pure hardware cost is higher with respect to the simpler structures, the cost/performance ratio is still fovourable to the GHC
Keyword: hypercube interconnection network, 2d-FFT, parallel implementation, cmos